1. Field of the Invention
Embodiments of the invention relate generally to semiconductor memory devices. More particularly, embodiments of the invention relate to multi-bit flash memory devices.
A claim of priority is made to Korean Patent Application No. 2006-104611 filed on Oct. 26, 2006, the disclosure of which is hereby incorporated by reference in its entirety.
2. Description of Related Art
Semiconductor memory devices can be roughly divided into two categories: volatile and nonvolatile semiconductor memory devices. Volatile semiconductor memory devices often have higher operating frequencies than nonvolatile semiconductor memory devices, but they lose stored data when disconnected from an external power supply. On the other hand, nonvolatile memory devices tend to operate more slowly than volatile semiconductor memory devices, but can retain stored information even when disconnected from an external power supply. Due to this ability to retain stored data in the absence of external power, nonvolatile memory devices are often included in devices where power is limited or may be cut off unexpectedly, such as in portable electronic devices.
There are many different kinds of nonvolatile memory devices, including, for example, masked read-only memory (MROM), programmable ROM (PROM), erasable and programmable ROM (EPROM), and electrically erasable and programmable ROM (EEPROM). Unfortunately, however, it is relatively difficult to update stored data in MROMs, PROMs and EPROMs. As a result, these types of memories are most useful in applications where data is rarely, if ever, updated. In contrast, EEPROMs are commonly employed in a wide variety of applications because they allow programmers to update data frequently using electrical read, programming, and erase procedures.
One especially popular form of EEPROM is flash memory. Relative to other types of EEPROMS, flash memory is very popular due at least to its high degree of integration, low power consumption, and high resistance to physical shock. Because of these and other advantages, researchers continue to devote significant resources to the further development of flash memory technology. As an example of one relatively recent development, researchers have sought to increase the integration density of flash memory by designing flash memory cells capable of storing more than one bit. Such memory cells are commonly referred to as multi-level cells (MLCs) or multi-bit cells.
Like one bit flash memory cells, multi-level cells store data in relation to distinct threshold voltage states. The term “threshold voltage state” here denotes a state of a flash memory cell's threshold voltage that falls within a particular corresponding threshold voltage distribution. For example, FIGS. 1 and 2 illustrate various threshold voltage distributions defining threshold voltage states for single-bit flash memory cells and multi-bit flash memory cells. In particular, FIG. 1 shows different threshold voltage distributions for 1-bit, 2-bit, and 4-bit flash memory cells and FIG. 2 shows different threshold voltage distributions for 1.5-bit, 2.5-bit, and 3-bit flash memory cells.
Referring to FIG. 1, the one-bit flash memory cell stores data in relation to two distinct threshold voltage distributions, labeled “1” and “0”. Where the one-bit flash memory cell has a threshold voltage state within the threshold voltage distribution labeled “1” (i.e., a threshold voltage state “1”), the one-bit flash memory cell stores a logical “1”. Otherwise, where the one-bit flash memory cell has a threshold voltage state within the threshold voltage distribution labeled “0” (i.e., a threshold voltage state “0”), the one-bit flash memory cell stores a logical “0”.
Similarly, the two-bit memory cell can store “11”, “10”, “00”, and “01” by assuming different threshold voltage states within respective threshold voltage distributions labeled “11”, “10”, “00”, and “01”. Likewise, the 4-bit, 1.5-bit, 2.5-bit, and 3-bit memory cells can store data in relation to the threshold voltage distributions illustrated in FIGS. 1 and 2.
As can be seen in FIGS. 1 and 2, adjacent threshold voltage distributions tend to be separated by smaller margins as the number of threshold voltage distributions increases. As a result, flash memory cells designed to store more bits tend to be more susceptible to programming and sensing errors. For example, if leakage current occurs in the floating gate of a flash memory cell having small margins between adjacent threshold voltage distributions, it is more likely that a corresponding shift in the threshold voltage of the memory cell will cause a change in the threshold voltage state of the memory cell.
Moreover, as variation occurs in processing conditions for forming the multi-bit cells, in voltage levels of selected word lines, in the operating voltage of the multi-bit cells, or the temperature of the multi-bit cells, it becomes more likely that sensing or programming errors will occur due to the small inter-threshold voltage distributions of multi-bit cells. Because of the relatively lower reliability of multi-bit flash memory cells, single-bit flash memory devices remain more popular than multi-bit flash memory devices.
However, as flash memory devices continue to proliferate, some system designers have found it advantageous to create system components where multi-bit and single-bit flash memory devices can be used interchangeably. For instance, it may be useful to design page buffer circuits capable of programming or reading data in single-bit flash devices or multi-bit flash devices. Historically, most page buffer circuits had been developed to function exclusively with single-bit or multi-bit flash memory devices. However, some contemporary devices are designed to have more flexibility.
For example, recently, composite type flash memory devices have been developed. The composite type flash memory devices comprise single and multi-bit memory cells or multi-bit memory cells capable of storing different numbers of bits. As an example, some devices have been developed to operate in different modes where memory cells are used to store different numbers of bits. For example, a multi-bit flash memory device may be operated in a single-bit mode where each memory cell stores one bit of data or in a multi-bit mode where each memory cell stores more than one bit of data. The mode of the multi-bit flash memory device can be changed, for example in accordance with states of one or more fuses.
Unfortunately, page buffer technology for flash memory devices has not evolved to keep pace with the requirements of composite or multi-mode flash memory devices. As a result, multiple different types of page buffers may have to be used in composite type flash memory devices or different page buffers may have to be used depending on the mode of the multi-mode flash memory device. Unfortunately, this requirement for multiple page buffers tends to increase the chip size of flash memory devices.